Quiz Electronics Engineering
Each Question carries 1 Mark
Negative Marking: 1/4
Time: 10 Minutes
Q1. Which of the following cannot be restarted?
(a) Transaction aborted due to software error.
(b) Transaction not aborted due to hardware or software error but aborted due to internal logic.
(c) Transaction aborted due to hardware error.
(d) Observable external writes.
Q2. To multiply a number by 8 in 8085 we have to use RAL instruction:
(d) Four times
Q3. A strictly binary tree with 9 leaves
(a) Cannot have more than 9 nodes
(b) Has exactly 18 nodes
(c) has exactly 19 nodes
(d) Has exactly 17 nodes
Q4. In the IPv4 addressing format the number of networks allowed under Class B addresses is
Q5. The physical location of a record is determined by mathematical formula transforms a file key into a record location in:
(a) a B-tree file
(b) an indexed file
(c) a hashed file
(d) a sequential file
Q6. A counting semaphore was initialized to 12. Then 15 P (wait) operations and x V(signal) operations were completed on this semaphore. If the final value of semaphore is 7. then the value of x will be
Q7. Which of the following statements is true?
(a) Hard real time OS has equal jitter as soft real time OS
(b) Hard real time OS has more jitter than soft real time OS
(c) Hard real time OS has less jitter than soft real time OS
(d) None of the above
Q8. Choose the most appropriate HTML tag in the following to create an unordered lot
Q9. In which of the following types of A/D converter does the conversion time almost double for every bit added to the device?
(a) Counter type A/D converter
(b) Tracking type A/D converter
(c) Single-slope integrating type A/D converter
(d) Successive approximation type A/D converter
Q10. The frequency of the ripple in the output voltage of a 3-phase semi convertor depends upon
(a) the load circuit parameters
(b) firing angle and load resistance
(c) firing angle and the supply frequency
(d) firing angle and load inductance
Sol. RAL stands for Rotate Accumulator Left and also involves Carry flag in rotation. It rotates the Accumulator contents to the left by 1-bit position. When RAL instruction is used once the number is doubled.
Sol. A strict binary tree with ‘n’ leaf nodes always have ‘2n-1’ nodes.
Here, n = 9,
So, number of nodes = 2 x 9 – 1 = 18 – 1 = 17 nodes.
Therefore, Exactly 17 nodes are possible i.e. 9 leaf nodes and 8 internal nodes.
Sol. Class B has 16 network bits and 16 host bits.
Now, out of 16 network bits first 2-bits are reserved for Network ID i.e. “10” and remaining are 14 bits used for different networks. Therefore total number of networks possible are 214.
Sol. Hashing is the mapping of a string of characters into a usually shorter fixed-length value or key that represents the original string. The values returned by a hash function are called hash values, hash codes, digests, or simply hashes. Hashing is used to index a hash table and retrieve items in a database. It is faster to find the item using the shorter hashed key.
Initial value of semaphore = 12
Final value of semaphore = 7
Number of wait operation = 15
Number of signal operation = x
We know that, Wait and Signal are two operations used in semaphores.
Wait(P): used when some process enter into the critical section, it decrements the value of the counting semaphore by 1.
Signal(V): used when some process exit into the critical section then this increments the value of the counting semaphore by 1.
Now, 12 – 15 + x = 7
-3 + x = 5
So, x = 8
Sol. Jitter is the variation between the signals or data being sent.
Hard real time OS deals with more sensitive systems as compared to Soft real time OS so it follows strict deadlines i.e., cannot allow more delay. So hard real time OS has less jitter than soft real time OS.
In a hard-real time OS, a single failure to meet the deadline may lead to a complete system failure while in a soft real time system is a OS, there may be one or more failures to meet the deadline.
<dl>: Defines the description list
<ol>: Defines an ordered list with number
<ul>: Define an unordered list with dot
<li>: No use in HTML
Sol. The maximum conversion time in counter type A/D converter is
Tc = (2^n-1) T_clk≈2^n T_CLK
where n is number of bits
So, every time 1 bit is added the conversion time gets doubled.