Quiz Electronics Engineering 28 March 2020

Quiz Electronics Engineering
Exam: NIC
Topic: Miscellaneous
Date: 28/03/2020

Each Question carries 1 Mark
Negative Marking: 1/4
Time: 10 Minutes

Q1. Software is
(a)Subset of programs
(b)Superset of programs
(c)Set of programs
(d)None of the above
L1 Difficulty 2
QTags Software Engineering
QCreator Vikram Kumar

 

Q2. Protocols are
(a)Agreements on how communication components and DTE’s are to communicate.
(b)Logical communication channels used for transferring data.
(c)Physical communication channels used for transferring data.
(d)None of the above
L1 Difficulty 2
QTags Networking
QCreator Vikram Kumar

 

Q3. In analyzing the compilation of PL/I program the description “resolving symbolic address (labels) and generating machine language” is associated with
(a)Code generation
(b)Storage assignment
(c)Assembly and output
(d)Syntax analysis
L1 Difficulty 4
QTags Compiler Design
QCreator Vikram Kumar

 

Q4. Relative Addressing Mode is used to write Position-independent code because
(a)The Code in this mode is easy to optimize
(b)The Code in this mode is easy to make resident
(c)Code executes faster in this mode
(d)The Code in this mode is easy to relocate in the memory
L1 Difficulty 4
QTags Computer Organization & Microprocessor
QCreator Vikram Kumar

 

Q5. Analog systems are different from digital systems because
(a)They use transistors
(b)They handle information in digital form
(c)They handle information in analog form
(d)They are slow
L1 Difficulty 2
QTags Digital Electronics
QCreator Vikram Kumar

 

 

Q6. Concurrent processes are processes that
(a)Overlap in time
(b)Do not overlap in time
(c)Are executed by a processor at the same time
(d)None of the above
L1 Difficulty 3
QTags Operating System
QCreator Vikram Kumar

 

 

Q7. The data flow model of an application mainly shows
(a)The underlying data and the relationships among them
(b)Processing requirements and the flow of data.
(c)Decision and control information.
(d)Communication network structure.
L1 Difficulty 3
QTags DBMS
QCreator Vikram Kumar

 

 

Q8. The order of an algorithm that finds whether a given Boolean function of ‘n’ variables, produces, a 1 is
(a)Exponential
(b)Constant
(c)Linear
(d)Logarithmic
L1 Difficulty 3
QTags Computer
QCreator Vikram Kumar

 

Q9. Consider the following statements:
(i)First-in-first out types of computations are efficiently supported by STACKS.
(ii)Implementing LISTS on linked lists is more efficient than implementing LISTS on an array for almost all the basic LIST operations.
(iii)Implementing QUEUES on a circular array is more efficient than implementing QUEUES on a linear array with two indices.
(iv)Last-in-first-out type of computations are efficiency supported by QUEUES.
Which of the following are correct?
(a)(ii), (iv) are true
(b)(i), (ii) are true
(c)(iii), (iv) are true
(d)(ii), (iii) are true
L1 Difficulty 2
QTags Data Structure
QCreator Vikram Kumar

 

Q10. Two 2H Inductance coils are connected in series and are also magnetically coupled to each other the coefficient of coupling being 0.1. The total inductance of the combination can be
(a)0.4H
(b)3.2H
(c)4.4H
(d)4.0H
L1 Difficulty 3
QTags Network & Circuit Theory
QCreator Vikram Kumar

 

SOLUTIONS

S1. Ans.(b)
Sol: A software is a set of instructions or programs. It instructs a system for performing a task. Superset means a set A is a superset of another set B if all elements of the set B are elements of the set A. Similarly, here all programs and instructions are included in software so Software is superset of programs.

S2. Ans.(a)
Sol: Protocols are a set of rules for governing exchange of information in an easy, reliable and secure way. It tells us how to format, transmit and receive data during communication, regardless of differences in their underlying infrastructures, designs or standards.

S3. Ans.(c)
Sol: The final phase of the compiler is the target code generation. It gets input from code optimization phase and produces the target code or object code. It consists of relocatable machine code or assembly code. Intermediate instruction are translated into a sequence of machine instructions that performs the same task.
Six Phases of the Compilation Process are:-
Lexical Analysis.
Syntax Analysis.
Semantic Analysis.
Intermediate Code Generation.
Code Optimization.
Target Code Generation.

S4. Ans.(d)
Sol: In Relative addressing mode, Effective address of the operand is obtained by adding the content of program counter with the address part of the instruction. The address reference is position-independent, it is relative to current location. So, we can easily relocate these programs in the memory of the computer.

S5. Ans.(c)
Sol: In analog systems, all the information remains in analog form.

S6. Ans.(a)
Sol: Concurrent processes are processes in OS in which multiple processors execute instructions simultaneously for better performance. All share the CPU and memory. But they do overlap in time while execution because at a time CPU entertain only one process but it can switch to other without completing it as a whole.

S7. Ans.(b)
Sol: A Data Flow Model represents the flow and exchange of information within a system with the help of diagram. Diagrams follow a hierarchy. It consists of several layers, where each layer is unique to a specific process or data function.

S8. Ans.(a)
Sol: For ‘n’ Boolean variables, there are 2n rows in truth table. To check whether output is ‘1’ or not, in worst case we have to check all the 2n possible input combinations which means every possible rows. It will take O(2n). So, Order is Exponential.

S9. Ans.(d)
Sol: Stack uses LIFO system and queue uses FIFO system. So, statement (i) and (iv) are wrong.

S10. Ans.(c)
Sol:
Given: Coefficient of coupling (k) = 0.1
L = L1 + L2 ± 2M
= L1 + L2 ± 2kL_1L2 [ ∵ M = k√(L_1 L_2 ) ]
= 2 + 2 ± 2(0.1) √(2 x 2)
= 4 ± 0.4

So, L = 3.6H or 4.4H

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